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IEC 60191-6-6 Ed. 1.0 b:2001

Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)
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IEC 60191-6-6 Ed. 1.0 b:2001

Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)

PUBLISH DATE 2026
PAGES 18
IEC 60191-6-6 Ed. 1.0 b:2001
Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)
IEC 60191-6-6:2001 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.
SDO IEC: International Electrotechnical Commission
Document Number IEC 60191
Publication Date April 1, 2026
Language b - English & French
Page Count 18
Revision Level 1.0
Supercedes
Committee 47D
Publish Date Document Id Type View
April 1, 2026 IEC 60191-6-6 Ed. 1.0 b:2001 Revision
March 1, 2001 Revision