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IEC 63378-6 Ed. 1.0 b:2026

Thermal standardization on semiconductor packages - Part 6: Thermal resistance and capacitance model for transient temperature prediction at junction and measurement points
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IEC 63378-6 Ed. 1.0 b:2026

Thermal standardization on semiconductor packages - Part 6: Thermal resistance and capacitance model for transient temperature prediction at junction and measurement points

IEC 63378-6 Ed. 1.0 b:2026

IEC 63378-6:2026 specifies a thermal resistance and capacitance model for semiconductor packages. This model is named the digital transformation using thermal resistance and capacitance (DXRC) model. It predicts transient temperature at junction and measurement points.

This document applies to semiconductor packages such as TO-252, TO-263, and HSOP. It supports single chip packages dissipated heat from single package surface.

SDO IEC: International Electrotechnical Commission
Document Number IEC 63378
Publication Date Not Available
Language b - English & French
Page Count 62
Revision Level 1.0
Supercedes
Committee 47D
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