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IPC/JEDEC-9301

Numerical Analysis Guidelines for Microelectronics Packaging Design and Reliability
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IPC/JEDEC-9301

Numerical Analysis Guidelines for Microelectronics Packaging Design and Reliability

PUBLISH DATE 2018
IPC/JEDEC-9301
Numerical Analysis Guidelines for Microelectronics Packaging Design and Reliability
The IPC/JEDEC-9301document is an effort to standardize and document some of the basic tenets of a typical Finite Element Analysis (FEA) model, as well as, to educate new designers (and in some cases even experienced designers) on the basic information and best practices that should be captured and provided to technical reviewers of the results of FEA data.
SDO IPC: IPC by Global Electronics Association
Document Number 9301
Publication Date Dec. 1, 2018
Language en - English
Page Count
Revision Level 0
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Publish Date Document Id Type View
Dec. 1, 2018 IPC/JEDEC-9301 Revision