JEDEC JESD22-B113C

Current Revision
Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

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Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products

PUBLISH DATE 2025
This test method is intended to evaluate and compare the performance of SMT ICs in an accelerated test environment for handheld electronic products applications.
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