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IEC 61691-6 Ed. 2.0 en:2021

Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
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International Electrotechnical Commission Logo

IEC 61691-6 Ed. 2.0 en:2021

Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions

PUBLISH DATE 2021
IEC 61691-6 Ed. 2.0 en:2021
Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
IEC 61691-6:2021(E) defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models. This standard is published as a double logo IEC-IEEE standard.
SDO IEC: International Electrotechnical Commission
Document Number IEC 61691
Publication Date June 1, 2021
Language en - English
Page Count
Revision Level 2.0
Supercedes
Committee 91
Publish Date Document Id Type View
June 1, 2021 IEC 61691-6 Ed. 2.0 en:2021 Revision
June 1, 2021 Revision